GRMON not writing to Nexys A7 memory

I am working on a project where I am trying to run RTEMS on a Leon3 that exists on the Artix 7 FPGA on the Digilent Nexys A7 100t board. I have successfully programed the Leon3 bitfile from the GRLIB IP files to the board, and connected to it through GRMON.

I have also successfully compiled the RTEMS sources for the leon3 and tested it through TSIM to make sure it would load and run successfully, which it did.

However when trying to load and run the same .elf file, or any file, to the actual board through GRMON, nothing gets written to memory. I have also tried manually writing data to memory, still with no luck.

I’m new to developing on the leon3 and with GRMON, so if anyone has any recommendation that would be greatly appreciated, thanks.

Hi Hamilton,

Could you copy the printout you get from GRMON when connecting to the design? I basically want to see the IPs listed right after connecting. If you can also copy the part where you load the program, then so much the better.


Here you go:
Connecting with GRMON:

Loading and running the file:
grmon3> load rki.elf
40000000 .text 892.6kB / 892.6kB [===============>] 100%
400df260 .rtemsroset 480B [===============>] 100%
400e1440 .data 24.8kB / 24.8kB [===============>] 100%
Total size: 917.81kB (91.07kbit/s)
Entry point 0x40000000
Image C:/Users/HamiltonHenneberg/Desktop/cFSProject/rki2/leon-rcc/rki.elf loaded

grmon3> run
Exception (tt = 0x02, illegal instruction)
0x40000000: 00000000 unimp

Thanks. I just wanted to make sure the DDR2 memory controller was there.

So basically the memory can’t be reached. That would point to a memory controller issue. Could you check if you can access registers in other parts of the device? GRETH, SPI Memory Controller or the Timer Unit are good candidates to check.

Also, if you could also post the memory map by doing “info sys”, that would help identify if there is any overlap in the AHB memory mapping.

Is this the leon3-digilent-nexys4ddr design on GRLIB? If so, are you using the existing bitfiles or are you building your own bitstream?

Hi Joaquin,

I think I fixed the issue, thanks for the help though!

I ran the “ddr2delay scan”, which recalibrated the DDR2SPA controller data delays

grmon3> ddr2delay scan
DDR2 Delay calibration routine

  • Resetting delays
  • Trying read-delay 0 cycles
    Bits 15- 8: ---------------------------------------------------------------- -1
    Bits 7- 0: ---------------------------------------------------------------- -1
  • Trying read-delay 1 cycles
    Bits 15- 8: OOOOOOOOOOOOO-------------------OOOOOOOOOOOOO------------------- 6
    Bits 7- 0: OOOOOOOOOOO---------------------OOOOOOOOOOO--------------------- 5
  • Verifying
  • Calibration done

then it loaded and ran without reporting any errors:

if you still want me to share anything or think there may be further issues feel free to let me know