Error with Zynq ZC702 compiling w/ GHDL


I am trying to compile leon3-xilinx-zc702 example design with GHDL. Here is what I have done:


export XILINX=/home/<username>/Desktop/Xilinx/Vivado/2022.1/data
export GRLIB=/home/<username>/grlib-gpl-2022.1-b4272
source /home/<username>/Desktop/Xilinx/Vivado/2022.1/

in …/designs/leon3-xilinx-zc702/ directory

make xconfig

click “save and exit” to create config.vhd

config.vhd created

make ghdl

ghdl -m -fexplicit --ieee=synopsys --mb-comments --warn-no-binding -O2 --workdir=gnu/work --work=work `cat ghdl.path` testbench
leon3_zc702_stub_sim.vhd:8:9:error: cannot find resource library "unisim"
make: *** [../../bin/Makefile:496: testbench] Error 1

Do I need to map the unisim library to GHDL? If so, how would I do that?