Help simulating NOEL-V with GHDL

Hello,

I’m doing a master project with the NOEL-V, I was hoping somebody could help me resolve some doubts. I don’t have an FPGA at the moment, so I’m trying to do a simulation using GHDL. I have changed the TECHLIBS and other technology variables to inferred, but seems like there are some technology dependent components since I get an error because of missing the unisim libraries. What do I have to modify so I don’t require said libraries?

Also, if I get an FPGA in the future, is there support for co-simulation using an smaller Xilinx board? Or alternatively for any Altera board?

Thanks to all for your help!

Marc

Hello Marc,

Without knowing which design you are trying to simulate and what error message you see it is hard for me to help. The NOEL-V itself should not include any technology specific components when you set the VHDL generic tech (or memtech or favtech) to inferred. It is unclear if you have set the VHDL generic or only set the variable TECHLIBS in the makefile to inferred.

Do you mean by “co-simulation” to run and debug software on the NOEL-V processor running on the Xilinx board? This is possible, at the moment via GRMON (our software debug tool) and in the future also other solutions like OpenOCD. Both supports GDB debugging.

Regards,
Nils

Hi Nils,

Thanks for your answer, I am using the “noelv-xilinx-kcu105” template design. From what you said I think I did it wrong, I just set the TECHLIBS to inferred in the Makefile and FABTECH, MEMTECH, PADTECH and CLKTECH in the config.vhd file. I guess this is not enough as when executing make ghdl I get the following error: noelvmp.vhd:53:9: cannot find resource library “unisim”. Do I have to also modify the VHDLSYNFILES? Or how do I set the VHDL generic?

When I said “co-simulation” I meant to run a part of the core in a small FPGA and simulate the rest, but I don’t know which boards could I use for that.

Thanks again for your support!

Regards,

Marc

Hi Marc,

This particular template design uses unisim in the top level. The error message suggests shows that the dependency can be found on line 53 in the file noelvmp.vhd. Some hands-on modifications to remove all technology dependencies from the design will be needed.

Best regards,
Martin