Monitor the internal signal with the ILA


may I ask if it’s possible to add the Integrated Logic Analyzer (ILA) to the NOEL-V SoC design to monitor the internal signals?

I tried adding the ILA or VIO to the NOEL-V design, which can be synthesized, but I failed to place the ILA or VIO during implementation.

(BTW, I followed some ila tutorials for Microblaze-based projects, and worked well.)

I have the following two specific questions:

  1. If it’s not possible to insert the ILA, then why?

  2. Are there any approaches to monitoring the internal signals in the NOEL-V design?

I would really appreciate it if someone could help! Either way, thanks in advance.


I have never used the ILA IP from Xilinx, so I cannot really comment on that. However, we have a logic analyzer IP, LOGAN, that would serve that purpose and is available in the GPL release of GRLIB. Would that help, or do you need to use the IP from Xilinx?


Hello Joaquin,

Thanks a lot for your feedback. I need to use the IPs from Xilinx because I extended the NOEL-V SoC with IPs from Xilinx, which are subject to Xilinx licenses. As you said, the LOGAN is used to monitor the open-source IPs from GRLIB, so it probably doesn’t support the IPs from Xilinx.

In addition, can a student or a researcher has access to the LOGAN? I didn’t find any information about LOGAN on the Gaisler website. Can you provide a instruction on how to work with LOGAN to monitor the NOEL-V SoC if it’s possible?

Best Regards,


Hi ciaociao,

Yes, LOGAN will most likely not work with IPs from Xilinx, especially if they come encapsulated in their proprietary IP format (.xci) or as encrypted RTL. However, the LOGAN IP is still relevant for NOEL-V. Please check the section 98 of grip.pdf, link below:


1 Like

Hello Joaquin,

Thanks for your feedback. It helps a lot.

Best Wishes,