Hello,
First just wanted to say thank you to putting this library and RTL out on a GPL License! I’m a student and my research is in RISC-V, and it’s hard to find 64-bit RISC-V IP designs to use for research.
On to my questions:
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I’ve downloaded the example design bitstreams to test out the Noel-v system, and it was a nice surprise to see there’s a VC707 Noel-v design (which is the FPGA I use). I’ve been able to load all of it up and boot Linux on it. Is there anyone that has a riscv-pk (BBL) version instead of OpenSBI? If not, I’ll transfer some of the platform specific code over, as I have to use it for my specific area.
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I started looking at the GRLIB Library and there is also a VC707 Noel-v design folder. I’m not sure if it’s in a working state or not. I went to configure the SoC with xconfig, and it uses the Leon processor configs instead of Noel. Also when generating the design with Vivado, if 1gb Ethernet is enabled, Implementation fails due to a blackbox not defined. It’s “gtxc0” for a “gbitc” module that isn’t found anywhere in the Gaisler Ethernet IP files.
Thank you again for the help!
Justin
Hi Justin,
For your second question about the noelv-xilinx-vc707 template design, the xconfig system isn’t fully updated for the NOEL-V template designs. The design configuration in the config.vhd file in noelv-xilinx-vc707 has been tested, but at this moment it can’t be updated with the xconfig system.
GRETH_GBIT is not included in the GPL release and is disabled in the config.vhd file included in the release.
Best regards,
Martin
Hey Martin,
Copy on the xconfig.
For the Greth_gbit, so it’s disabled but when trying to run implementation using Vivado, for some reason the gbit eth files are still added to the project sources. Even when it’s disabled in the config.vhd, it causes an error during implementation as it’s trying to instantiate it. Should I be removing something in the makefiles or config to stop it?
Hi Justin,
Using the GRLIB script environment system the GRETH_GBIT wrappers will be included in the Vivado project, but since the CFG_GRETH1G constant is set to 0 in config.vhd, the grethm entity, which is used in noelvmp, should have the giga generic set to 0 and consequently instantiate the greth entity. So a component declaration of the greth_gbitc should be sufficient to allow the greth_gbit to pass through compilation.
I tried running the noelv-xilinx-vc707 in Vivado 2018.1 with the default configuration files without any errors.
What error message do you get from Vivado?
Best regards,
Martin
Hi,
Bringing up an old thread - the noelv-xilinx-vc707 target was available in earlier GRLIB releases (i.e. 2022.4-b4280) but not in the recent 2024.1-b4292 release. Is there any reason for that?
Should/can the noelv-generic target be used on the VC707 ?
Thanks,
Zoltan H
Hi Zoltan,
The VC707 design was removed basically because it had some issues and further testing was needed. We have not found the time to continue in this direction. Is this a design you would benefit from? Just to bring this up with the team.
Basically, the noelv-generic is the basic design all our NOEL-V board-specific designs are built around. You will be missing the top layer that instantiates the components specifically in the VC707 kit, so some work would be needed.
Regards,
Joaquin
Hi Joaquin,
I see, thanks for the follow-up. I wanted to use my VC707 for porting a specific Linux distribution to NOEL-V, but if the implementation on it has issues, no problem, I’ll get an Arty-A7. Loosely related question - LEON5 is OK on VC707, right?
I’m afraid I do not have enough experience around FPGAs yet to use the -generic target then - thank you.
Best regards,
Zoltan H
Hi Zoltan,
Yes, there are no issues reported on the leon5-xilinx-vc707 design that I am aware of. If you find anything, we will make sure to solve it.
The Arty-A7 board you plan to use is also fine, but be aware that only a small NOEL-V configuration will fit.
Regards,
Joaquin