The development team is pleased to announce the release of GRLIB GPL 2022.4-b4280, which is now available for download from:
http://www.gaisler.com/products/grlib/grlib-gpl-2022.4-b4280.tar.gz
Bitfile and netlist packages are available via:
The changelog is here:
http://www.gaisler.com/products/grlib/Changelog.txt
and is also reproduced below.
Some of the highlights are:
- NOEL-V v8 release: NOEL-V
- Added support for TIME CSR
- Added support for Sstc extension
- Added support for Zicbom extension
- Improved instruction trace
- Fixed issue that could case FPU instruction to lockup.
- Fixed issue regarding IRQ (priority and delegation)
- Fixed issue with annulled TLB fence instructions
- Fixed issue with instruction paired with xTVEC CSR writes
- Corrected reset state of TLBs
- Bug fixes and general improvements for NOEL-V
- SPIMCTRL: Extended with more read protocols/modes. The memory controller can now be configured to work with the following read protocols:1-1-1, 1-1-2, 1-1-4, 1-2-2, 1-4-4, 2-2-2 (Dual SPI), 4-4-4 (Quad SPI)
- General IP updates
Updated example bitstreams for LEON5 and NOEL-V will be available for download from during the upcoming week:
https://www.gaisler.com/index.php/products/processors/noel-examples
If you find any any reproducible bugs or issues please don’t hesitate to post in the community.
----------------------- Release 2022.4-b4280 ---------------------------
2022-12-07 NOEL-V: Updated NOEL-V release.
- Added support for TIME CSR
- Added support for Sstc extension
- Added support for Zicbom extension
- Improved instruction trace
- Fixed issue that could case FPU instruction to lockup.
- Fixed issue regarding IRQ (priority and delegation)
- Fixed issue with annulled TLB fence instructions
- Fixed issue with instruction paired with xTVEC CSR writes
- Corrected reset state of TLBs
2022-11-11 SPIMCTRL: Extended with more read protocols/modes
The memory controller can now be configured to work with the following read protocols:
1-1-1, 1-1-2, 1-1-4, 1-2-2, 1-4-4
2-2-2 (Dual SPI)
4-4-4 (Quad SPI)
Additional features:
- New 'dummycycles' setting allowing for finer control over the number of dummy cycles.
- 4 byte address mode for reads.
- The configuration of the controller (e.g. DSPI/QSPI, 4-byte mode) can now be changed through a register interface.
2022-09-05 SPIMCTRL: Added little-endian support.
2022-08-25 Updated the license header to refer to version 2.