GRLIB GPL 2024.1 released

The development team is pleased to announce the release of GRLIB GPL 2024.1-b4291, which is now available for download from:

Bitfile and netlist packages are available via:

The changelog is here:

and is also reproduced below.

Some of the highlights are:


  • Support for TCM with non power-of-two size
  • Fix for MMU probe ASI
  • Bugfix for data_store_error trap delivery


  • System bus access support for debug-module
  • Interrupts are now allowed on CSR writes
  • Improve branch prediction without C-extension
  • CSR read with debug-module can now return error

New LEON5 template design for Xilinx VCU128 kit

  • leon5-xilinx-vcu128

Updated example bitstreams for LEON5 and NOEL-V are available for download from:

If you find any any reproducible bugs or issues please don’t hesitate to post in the community.

----------------------- Release 2024.1-b4291 ---------------------------

2024-03-21 NOEL-V updates

  • Added system bus access support for debug-module
  • Now interrupt is allowed on CSR writes
  • Fixed issue with ICOUNT trigger and CSR VSATP, INSTRET
  • Improve branch prediction when C-extension is disabled
  • CSR read with debug-module can now return error
  • Only supported values can now be written to DCSR
  • BTB is not flushed when entering debug mode
  • NOEL-V subsystem: added 16550UART and removed dummy AHB bridge

2024-03-19 LEON5: Fix for MMU probe ASI, could perform unnecessary read access during table walk when set to stop at PTD.

2024-02-22 leon5-xilinx-vcu128: Leon5 template design for Xilinx VCU128 added.

2024-01-30 LEON5/TECHMAP: Added new mapping for syncram with built in data loop back to allow for large TCM timing optimizations.

2024-01-25 Documentation updates.

  • IRQMP:
    • Added interrupt remapping and extended interrupts to block diagram.
    • Added software usage note on level interrupts.
    • Clarified additional consequences of the shared decrementer.

2024-01-18 LEON5: Add support for TCM with non power-of-two size, where only a fraction of the TCM space is backed by memory. This is to allow finer control of TCM size.

2024-01-18 LEON5: Bugfix for data_store_error trap delivery introduced in release 2023.2.

In my design, L2C-Lite is located between the AHBCTRL and DDR, no backend BUS. The new version of L2C-Lite will cause GRMON ‘verify’ command error.

The specific reason has not been analyzed yet, but from the results, it seems that the error was introduced by the following RTL update.

-- l2c_lite_core.vhd, Line 755~759
for j in 0 to AHBDW/8 -1 loop
  if j=counter then
    v.write_buffer(linesize * 8 - 8 * j - 1 downto linesize * 8 - 8 * (j + 1)) := hwdata(AHBDW - 8 * j - 1 downto AHBDW - 8 * (j + 1));
  end if;
end loop;


Thanks for spotting this. We will release a new GRLIB GPL release shortly to patch this. Target date is the first half of this week already.



We have released grlib-gpl-2024-1-b4292, please see the separate post. The L2C_lite issues should be resolved now.

Thanks for using the community to report bugs!


Hi Joaquin, It works, thanks!

Great, thanks for reporting back. Do not hesitate to reach out if there is anything else