2022-08-21T15:00:00Z I wonder how we can detach AHBJTAG module from LEON5 netlist.
We implemented LEON5 netlist into Xilinx Kintex UltraScale. We want to use a JTAG port of the FPGA to debug FPGA circuitry using ChipScope. However AHBJTAG module occupies the JTAG port ro use GRMON through the port. We were able to assign another port for GRMON. So if we can detach AHBJTAG module from AHB, we can use the JTAG port for ChipScope.
– Hiroki
2022-09-10T15:00:00Z
We moved from LEON5 netlist, and started using LEON5 for Kintex UltraScale built from grlib-gpl-2022.2-b4274. However, we’ve not been able to build an environment that can use ChipScope yet. Are we missing any steps?
Step 1) detached JTAG Debug Link by “make xconfig”,
Step 2) attached ChipScope (ila0) interface by Vivado.
We expect the following screen with the hardware manager to use MIG, which we can see when using MicroBraze, but it is not shown. We can not see registers on AHB, neither.
– Hiroki
2023-05-27T15:00:00Z
Finally, we have succeeded in using ChipScope.
We had to specify signal names explicitly using netlists after a logic synthesis.
LEON5 uses many packages, and finding proper signal names were not so easy.
Debug ready signals must be synchronized with a clock.
– Hiroki
