I’m trying to get acquainted with the toolchains for LEON3 and following the README in bcc2/src/examples/mkprom-hello, but I am unable to get it to work.
From the instructions:
- hello.prom contains the boot loader and a compressed version of hello.elf. It is linked for storage in non-volatile memory, typically on address 0x00000000.
I can get hello.elf running from RAM successfully.
My target is a LEON3 on a Digilent Arty A7 board. I flash the example from grlib/designs/leon3-digilent-arty-a7 unmodified. From the README I understand that I need to make sure that the binary ends up at 0x400000, because the lower portion of the flash is reserved for the FPGA bitstream (relevant quote at the end). Hence, I compiled the example with (0x400000 = 4194304):
$ make CFLAGS="-mcpu=leon3 -msoft-float" MKPROMOPT="-leon3 -freq 81 -baud 38352 -rstaddr 4194304"
Verify the start address:
$ sparc-gaisler-elf-objdump -x hello.prom hello.prom: file format elf32-sparc hello.prom architecture: sparc, flags 0x00000012: EXEC_P, HAS_SYMS start address 0x00400000
Flash it to ROM:
grmon3> spim flash load hello.prom 400000 .text 46.3kB / 46.3kB [===============>] 100% Total size: 46.31kB (821.49bit/s) Entry point 0x00400000 Image /.../examples/mkprom-hello/hello.prom loaded
Trying to run it:
grmon3> reset grmon3> run Exception (tt = 0x02, illegal instruction) 0x00400000: ffffffff unknown opcode: 0xffffffff
I don’t see anything on /dev/ttyUSB1 either (using screen). Checking the first few instructions:
grmon3> mem 0 0x00000000 88100000 09001000 81c120b0 01000000 .......... ..... 0x00000010 a1480000 a7500000 10800177 ac102001 .H...P.....w.. . 0x00000020 91d02000 01000000 01000000 01000000 .. ............. 0x00000030 91d02000 01000000 01000000 01000000 .. ............. grmon3> dis 0 4 0x00000000: 88100000 clr %g4 0x00000004: 09001000 sethi %hi(0x400000), %g4 0x00000008: 81c120b0 jmp %g4 + 0xb0 0x0000000c: 01000000 nop
What am I missing?
From README in designs/leon3-digilent-arty-a7:
Typically the lower part of the SPI flash device will hold the configuration bitstream for the FPGA. The SPIMCTRL core is configured with an offset value that will be added to the incoming AHB address
before the address is propagated to the SPI flash device. The default offset is 0x00400000 (this value is set via xconfig and the constant is called CFG_SPIMCTRL_OFFSET). When the processor starts after power-up it will read address 0x0, this will be translated by SPIMCTRL to 0x00400000.
SPIMCTRL can only add this offset to accesses made via the core’s memory area. For accesses made via the register interface the offset must be taken into account. This means that if we want to program the Flash with an application which is linked to address 0x0 (our typical bootloader) then we need to add the offset 0x00400000 before programming the file with GRMON. We load the Flash with our application starting at 0x00400000 and SPIMCTRL will then translate accesses from AMBA address 0x0 + n to Flash address 0x00400000 + n.