# Kernel panic due to 'linesize' generic of the l2c-lite

**URL:** https://discourse.grlib.community/t/kernel-panic-due-to-linesize-generic-of-the-l2c-lite/387
**Category:** General - GRLIB SoC
**Created:** [30 January 2024 08:13 UTC](https://discourse.grlib.community/t/kernel-panic-due-to-linesize-generic-of-the-l2c-lite/387 "2024-01-30T08:13:12Z")
**Posts on this page:** 1
**Page:** 1

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### Author: ![WEI](https://avatars.discourse-cdn.com/v4/letter/w/90ced4/32.png) [@WEI](https://discourse.grlib.community/u/WEI)
#### Post date: [30 January 2024 08:13 UTC](https://discourse.grlib.community/t/kernel-panic-due-to-linesize-generic-of-the-l2c-lite/387/1 "2024-01-30T08:13:12Z")

</div>

I tried the following combination:

```auto
1Way, 1KB/Way, 32B/Line - PASS
1Way, 32KB/Way, 32B/Line - PASS
4Way, 32KB/Way, 32B/Line - PASS
4Way, 128KB/Way, 32B/Line - PASS
4Way, 32KB/Way, 64B/Line - FAIL
4Way, 128KB/Way, 64B/Line - FAIL

```

32B linesize can boot kernel successfully, but 64B always fails.

I tried a simple simulation and did not find any clear RTL issues. I am not sure if the problem lies in Vivado (`Vivado 2022.2, XCVU19P device`).
