# Issues with 2026.2 on Digilent Arty-A7

**URL:** <https://discourse.grlib.community/t/issues-with-2026-2-on-digilent-arty-a7/584>\
**Category:** NOEL-V\
**Created:** [27 July 2026 11:28 UTC](https://discourse.grlib.community/t/issues-with-2026-2-on-digilent-arty-a7/584 "2026-07-27T11:28:54Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![robamu](https://avatars.discourse-cdn.com/v4/letter/r/a183cd/32.png) [@robamu](https://discourse.grlib.community/u/robamu)\
**Post date:** [27 July 2026 11:28 UTC](https://discourse.grlib.community/t/issues-with-2026-2-on-digilent-arty-a7/584/1 "2026-07-27T11:28:54Z")

</div>

Hello,

First of all, thanks a lot for providing the open-source Noel-V design! It is a great thing this exists and I learnt a lot while using it. I am currently trying some experiment of running Rust on a Noel-V using the Arty-A7 project (in case you are interested, you can find that [here](https://github.com/us-irs/noelv-rs-experiments).)

I managed to make some simple applications run on the grlib-gpl-2025.2-b4298  
that you [provide here](https://download.gaisler.com/products/GRLIB/bin/) . However, I could not make grlib-gpl-2026.2-b4300 work. I used `make xconfig` to re-configure the project to the IMAFC configuration with one core, and then built the project using Vivado 2026.1. This works, and I can then flash the design and I can also probe AHB masters and register information.

When I try to flash and run a minimal app using grmon4 and then single-step through the first few instructions, the program/processor seems to be stuck executing the first few instructions. Those instructions are related to reading the hart ID and/or disabling the interrupts. The disassemble command output and reading the first few bytes using the grmon mem read functions also prints (seemingly) incorrect information. I attached the info sys output between both version below.

I am a RISC-V beginner, so this is all new for me, and all help and guidance on what might be going wrong would be greatly appreciated. I think one interesting change was that the cmemconf variable was changed. Changing it back to 0 makes disassemble and mem read work, but i still have the same issue that I can not run code. Some background information: The startup assembler comes from the riscv-rt Rust library. It works well for the older designs.

I think you might have to update the ACLINT base address or some other interrupt controller related based address in the GRIP NOELVSYS docs, which now seems to be 0xB0000000.

`info sys` output for grlib-gpl-2025.2-b4298:

```auto
❯ grmon -digilent

GRMON debug monitor v4.1.2 64-bit eval version

Copyright (C) 2026 Frontgrade Gaisler - All rights reserved.
For latest updates, go to https://www.gaisler.com/
Comments or bug-reports to support@gaisler.com

This eval version will expire on 25/12/2026

WARNING! Share directory not found
JTAG chain (1): xc7a100t
Device ID: 0x330
GRLIB build version: 4298
Detected frequency: 40.0 MHz

Component Vendor
NOEL-V RISC-V Processor Frontgrade Gaisler
AHB Debug UART Frontgrade Gaisler
JTAG Debug Link Frontgrade Gaisler
AHB/APB Bridge Frontgrade Gaisler
Xilinx MIG Controller Frontgrade Gaisler
Generic AHB ROM Frontgrade Gaisler
AHB/APB Bridge Frontgrade Gaisler
AHB/APB Bridge Frontgrade Gaisler
RISC-V ACLINT Frontgrade Gaisler
RISC-V PLIC Frontgrade Gaisler
RISC-V Debug Module Frontgrade Gaisler
Generic UART Frontgrade Gaisler
Modular Timer Unit Frontgrade Gaisler
Version and Revision Register Frontgrade Gaisler
AHB Status Register Frontgrade Gaisler
General Purpose I/O port Frontgrade Gaisler

Use command 'info sys' to print a detailed report of attached cores

grmon4> info sys
cpu0 Frontgrade Gaisler NOEL-V RISC-V Processor
AHB Master 0
ahbuart0 Frontgrade Gaisler AHB Debug UART
AHB Master 9
APB: ff986000 - ff986100
Baudrate 115200, AHB frequency 40.00 MHz
ahbjtag0 Frontgrade Gaisler JTAG Debug Link
AHB Master 10
apbmst0 Frontgrade Gaisler AHB/APB Bridge
AHB: ff900000 - ffa00000
mig0 Frontgrade Gaisler Xilinx MIG Controller
AHB: 00000000 - 80000000
APB: ff980000 - ff980100
SDRAM: 256 Mbyte
ahbrom0 Frontgrade Gaisler Generic AHB ROM
AHB: c0000000 - e0000000
32-bit ROM: 512 MB @ 0xc0000000
apbmst1 Frontgrade Gaisler AHB/APB Bridge
AHB: ff400000 - ff500000
apbmst2 Frontgrade Gaisler AHB/APB Bridge
AHB: ff500000 - ff600000
clint0 Frontgrade Gaisler RISC-V ACLINT
AHB: e0000000 - e0100000
plic0 Frontgrade Gaisler RISC-V PLIC
AHB: f8000000 - fc000000
4 contexts, 31 interrupt sources, 7 max priority
dm0 Frontgrade Gaisler RISC-V Debug Module
AHB: fe000000 - ff000000
AHB trace: 64 lines, 128-bit bus
hart0: ISA rv32imafc, Modes M U
i, m, a, f, c, zaamo, zalrsc, zba, zbs, zca, zcf, zfa
zfbfmin, zfh, zicntr, zicond, zifencei, zihpm, zimop
Stack pointer 0x0ffffff0
icache 4 * 4 kB, 32 B/line, rnd,
dcache 4 * 4 kB, 32 B/line, rnd
3 triggers,
itrace 64 lines
uart0 Frontgrade Gaisler Generic UART
APB: ff900000 - ff900100
IRQ: 1
Baudrate 38461
FIFO debug mode available
gptimer0 Frontgrade Gaisler Modular Timer Unit
APB: ff908000 - ff908100
IRQ: 2
16-bit scaler, 2 * 32-bit timers, divisor 40
version0 Frontgrade Gaisler Version and Revision Register
APB: ff981000 - ff981100
Version 513, Revision 140
ahbstat0 Frontgrade Gaisler AHB Status Register
APB: ff982000 - ff982100
IRQ: 4
gpio0 Frontgrade Gaisler General Purpose I/O port
APB: ff983000 - ff983100

grmon4>

```

info sys output for grlib-gpl-2026.2-b4300:

```auto
❯ grmon -digilent

GRMON debug monitor v4.1.2 64-bit eval version

Copyright (C) 2026 Frontgrade Gaisler - All rights reserved.
For latest updates, go to https://www.gaisler.com/
Comments or bug-reports to support@gaisler.com

This eval version will expire on 25/12/2026

WARNING! Share directory not found
JTAG chain (1): xc7a100t
Device ID: 0x330
GRLIB build version: 4300
Detected frequency: 40.0 MHz

Component Vendor
NOEL-V RISC-V Processor Frontgrade Gaisler
RISC-V Debug Module Frontgrade Gaisler
AHB Debug UART Frontgrade Gaisler
JTAG Debug Link Frontgrade Gaisler
AHB/APB Bridge Frontgrade Gaisler
Xilinx MIG Controller Frontgrade Gaisler
Generic AHB ROM Frontgrade Gaisler
AHB/APB Bridge Frontgrade Gaisler
AHB/APB Bridge Frontgrade Gaisler
RISC-V Interrupt Controllers Frontgrade Gaisler
Generic UART Frontgrade Gaisler
Modular Timer Unit Frontgrade Gaisler
Version and Revision Register Frontgrade Gaisler
AHB Status Register Frontgrade Gaisler
General Purpose I/O port Frontgrade Gaisler

Use command 'info sys' to print a detailed report of attached cores

grmon4> info sys
cpu0 Frontgrade Gaisler NOEL-V RISC-V Processor
AHB Master 0
dm0 Frontgrade Gaisler RISC-V Debug Module
AHB Master 9
AHB Master 7
AHB: e0000000 - e1000000
AHB: f8400000 - f8500000
hart0: ISA rv32imac, Modes M U
i, m, a, c, smepmp, smpmpmt, svrsw60t59b, zaamo, zalrsc
zba, zbs, zca, zcb, zcmop, zicntr, zicond, zifencei
zihpm, zimop, zkt
Stack pointer 0x0ffffff0
icache 4 * 4 kB, 32 B/line, lru,
dcache 4 * 4 kB, 32 B/line, lru
3 triggers,
itrace 32 lines
ahbuart0 Frontgrade Gaisler AHB Debug UART
AHB Master 0
APB: ff986000 - ff986100
Baudrate 115200, AHB frequency 40.00 MHz
ahbjtag0 Frontgrade Gaisler JTAG Debug Link
AHB Master 1
apbmst0 Frontgrade Gaisler AHB/APB Bridge
AHB: ff900000 - ffa00000
mig0 Frontgrade Gaisler Xilinx MIG Controller
AHB: 00000000 - 80000000
APB: ff980000 - ff980100
SDRAM: 256 Mbyte
ahbrom0 Frontgrade Gaisler Generic AHB ROM
AHB: c0000000 - e0000000
32-bit ROM: 512 MB @ 0xc0000000
apbmst1 Frontgrade Gaisler AHB/APB Bridge
AHB: ff400000 - ff500000
apbmst2 Frontgrade Gaisler AHB/APB Bridge
AHB: ff500000 - ff600000
rvintctrl0 Frontgrade Gaisler RISC-V Interrupt Controllers
AHB: b0000000 - b0100000
AHB: fc000000 - fc400000
USR: 00000009
Backend: clint0 plic0
uart0 Frontgrade Gaisler Generic UART
APB: ff900000 - ff900100
IRQ: 1
Baudrate 38461
FIFO debug mode available
16550 interface available
gptimer0 Frontgrade Gaisler Modular Timer Unit
APB: ff908000 - ff908100
IRQ: 2
16-bit scaler, 2 * 32-bit timers, divisor 40
version0 Frontgrade Gaisler Version and Revision Register
APB: ff981000 - ff981100
Version 515, Revision 140
ahbstat0 Frontgrade Gaisler AHB Status Register
APB: ff982000 - ff982100
IRQ: 4
gpio0 Frontgrade Gaisler General Purpose I/O port
APB: ff983000 - ff983100
clint0 Frontgrade Gaisler RISC-V ACLINT
AHB: b0000000 - b0100000
plic0 Frontgrade Gaisler RISC-V PLIC
AHB: fc000000 - fc400000
AHB: b0018100 - b0018180
4 contexts, 31 interrupt sources, 7 max priority

grmon4>

```

---

<div class="post-metadata">

**Author:** ![robamu](https://avatars.discourse-cdn.com/v4/letter/r/a183cd/32.png) [@robamu](https://discourse.grlib.community/u/robamu)\
**Post date:** [4 August 2026 11:11 UTC](https://discourse.grlib.community/t/issues-with-2026-2-on-digilent-arty-a7/584/2 "2026-08-04T11:11:08Z")

</div>

Just as an update notice: I have also managed to test async/await support using the embassy framework while also adding embassy-time support. embassy is currently one of the most popular embedded Rust frameworks and simplifies software development by leveraging the async/await support baked into the language.  
I might also add platform specific support to allow using interrupt executor, which makes this even more viable for real-time systems.
