# GRLIB GPL 2021.1 released

**URL:** <https://discourse.grlib.community/t/grlib-gpl-2021-1-released/123>\
**Category:** General - GRLIB SoC\
**Created:** [29 April 2021 06:37 UTC](https://discourse.grlib.community/t/grlib-gpl-2021-1-released/123 "2021-04-29T06:37:12Z")\
**Posts on this page:** 1\
**Page:** 1

<div class="post-metadata">

**Author:** ![ronnback](https://avatars.discourse-cdn.com/v4/letter/r/f17d59/32.png) [@ronnback](https://discourse.grlib.community/u/ronnback)\
**Post date:** [29 April 2021 06:37 UTC](https://discourse.grlib.community/t/grlib-gpl-2021-1-released/123/1 "2021-04-29T06:37:12Z")

</div>

The development team is pleased to announce the release of GRLIB GPL 2021.1-b4265, which is now available for download from:

[http://www.gaisler.com/products/grlib/grlib-gpl-2021.1-b4265.tar.gz](http://www.gaisler.com/products/grlib/grlib-gpl-2021.1-b4265.tar.gz)

Bitfile and netlist packages are available via:

[https://www.gaisler.com/index.php/downloads/leongrlib](https://www.gaisler.com/index.php/downloads/leongrlib)

The changelog is here:

[http://www.gaisler.com/products/grlib/Changelog.txt](http://www.gaisler.com/products/grlib/Changelog.txt)

and is also reproduced below.

Some of the highlights are:

- Tightly coupled memory support added to LEON5
- General updates and bug fixes for LEON5
- Clarified support for Xilinx UltraScale and UltraScale+ devices in techmap constants
- Generic NOEL-V design added to provide a system that can be simulated without access to any technology specific primitives
- LEON3 template design for the Xilinx KCU105 development kit
- Little endian support for GRDMAC2 and AHBROM
- General IP updates

If you find any any reproducible bugs or issues please don’t hesitate to post in the community.

----------------------- Release 2021.1-b4265 ---------------------------

2021-04-06 LEON5 processor updates

New features:  
Tightly coupled memory option (scratchpad RAM) for instructions and data.  
Generic added on the leon5sys level to select between pre-defined standard cache/TLB size configurations.

Updates:  
Bug fixes for FPU in rare corner cases.  
NanoFPU rounding logic modified to implement tininess before rounding as required/expected by SPARC V8.

2021-04-01 Added LEON3 template design for the Xilinx KCU105 development kit (leon3-xilinx-kcu105).

2021-03-17 TECHMAP: Added constants for generic UltraScale and UltraScale+ as well as for Virtex UltraScale and Kintex UltraScale+. All UltraScale devices share the constant value 60 and all UltraScale+ devices share constant value 65.

2021-03-07 GRPCI2: small update to when interrupt status bit is set Interrupt status bit in configuration space for device/function 0 was reflecting the state of dirq[3] instead of dirq[0].

2021-03-03: GRDMAC2: added support for little endian AHB buses.

2021-01-19: AHBROM: added support for little endian AHB buses.
