# Latest

**URL:** https://discourse.grlib.community/latest.md

[Latest](https://discourse.grlib.community/latest.md) · [Categories](https://discourse.grlib.community/categories.md)

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## [Welcome to Discourse](https://discourse.grlib.community/t/welcome-to-discourse/7)

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**Author:** [@system](https://discourse.grlib.community/u/system)\
**Replies:** 0\
**Last updated:** [29 June 2020 10:28 UTC](https://discourse.grlib.community/t/welcome-to-discourse/7 "2020-06-29T10:28:51Z")

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The GRLIB.community Discourse is a community for users of LEON, NOEL-V and other SoC designs based on the GRLIB IP library. The community covers both hardware design and all associated software aspects. Users of standar…

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## [Custom AHB Slave Integration in NOEL-V Generic (GRLIB GPL 2025.2) ](https://discourse.grlib.community/t/custom-ahb-slave-integration-in-noel-v-generic-grlib-gpl-2025-2/566)

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**Author:** [@THEDARKHORSE](https://discourse.grlib.community/u/THEDARKHORSE)\
**Replies:** 2\
**Last updated:** [26 August 2026 05:56 UTC](https://discourse.grlib.community/t/custom-ahb-slave-integration-in-noel-v-generic-grlib-gpl-2025-2/566 "2026-08-26T05:56:30Z")

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Hello, I am integrating a custom AHB slave into the NOEL-V Generic reference design (GRLIB GPL 2025.2) targeting a Xilinx ZCU102 board. The custom slave is instantiated in noelvcore.vhd with: hindex = 9 haddr = 1…

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## [Troubleshooting VCU118 design issues in 2026.2](https://discourse.grlib.community/t/troubleshooting-vcu118-design-issues-in-2026-2/579)

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**Author:** [@MarcSB](https://discourse.grlib.community/u/MarcSB)\
**Replies:** 3\
**Last updated:** [10 August 2026 08:51 UTC](https://discourse.grlib.community/t/troubleshooting-vcu118-design-issues-in-2026-2/579 "2026-08-10T08:51:44Z")

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Hello everyone, We are currently experiencing several issues with the new VCU118 design provided in the 2026.2 release and were wondering if anyone has encountered something similar. For context, we have a working desi…

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## [GRLIB 2024.4 LEON3 NanoXP Medium fails timing](https://discourse.grlib.community/t/grlib-2024-4-leon3-nanoxp-medium-fails-timing/582)

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**Author:** [@romeo](https://discourse.grlib.community/u/romeo)\
**Replies:** 1\
**Last updated:** [10 August 2026 08:39 UTC](https://discourse.grlib.community/t/grlib-2024-4-leon3-nanoxp-medium-fails-timing/582 "2026-08-10T08:39:38Z")

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Hi everyone, I am currently working with GRLIB 2024.4 and the LEON3 NanoXP Medium reference design, and I have run into a timing issue that I would like to understand better. In NanoXplore Impulse, the clock in the def…

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## [Issues with 2026.2 on Digilent Arty-A7](https://discourse.grlib.community/t/issues-with-2026-2-on-digilent-arty-a7/584)

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**Author:** [@robamu](https://discourse.grlib.community/u/robamu)\
**Replies:** 1\
**Last updated:** [4 August 2026 11:11 UTC](https://discourse.grlib.community/t/issues-with-2026-2-on-digilent-arty-a7/584 "2026-08-04T11:11:08Z")

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Hello, First of all, thanks a lot for providing the open-source Noel-V design! It is a great thing this exists and I learnt a lot while using it. I am currently trying some experiment of running Rust on a Noel-V using t…

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## [Buildroot linux on leon3s - please help](https://discourse.grlib.community/t/buildroot-linux-on-leon3s-please-help/580)

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**Author:** [@laurentiuduca](https://discourse.grlib.community/u/laurentiuduca)\
**Replies:** 2\
**Last updated:** [23 July 2026 10:37 UTC](https://discourse.grlib.community/t/buildroot-linux-on-leon3s-please-help/580 "2026-07-23T10:37:27Z")

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hello, i try to run linux on a leon3-digilent-arty-a7 based design and everything goes fine until i get the following message Run /init as init process Unimplemented Sparc TRAP, type = 2b init(1): Whee… Hello Mr. Pen…

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## [GRLIB GPL 2026.2 released](https://discourse.grlib.community/t/grlib-gpl-2026-2-released/576)

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**Author:** [@joaquin.espana](https://discourse.grlib.community/u/joaquin.espana)\
**Replies:** 0\
**Last updated:** [1 July 2026 11:58 UTC](https://discourse.grlib.community/t/grlib-gpl-2026-2-released/576 "2026-07-01T11:58:27Z")

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The development team is pleased to announce the release of GRLIB GPL 2026.2-b4300, which is now available for download from: https://download.gaisler.com/products/GRLIB/bin/grlib-gpl-2026.2-b4300.tar.gz Bitfile and net…

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## [Noelv risc-v vector extension](https://discourse.grlib.community/t/noelv-risc-v-vector-extension/574)

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**Author:** [@laurentiuduca](https://discourse.grlib.community/u/laurentiuduca)\
**Replies:** 0\
**Last updated:** [26 June 2026 10:35 UTC](https://discourse.grlib.community/t/noelv-risc-v-vector-extension/574 "2026-06-26T10:35:57Z")

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Hello grlib community, I am an open source enthusiast with various projects on github. I gladly found the paper “Extending the NOEL-V Platform with a RISC-V Vector Processor for Space Applications”, Mascio, S. D., Menic…

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## [GRETH networking instability with L2C Lite enabled](https://discourse.grlib.community/t/greth-networking-instability-with-l2c-lite-enabled/560)

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**Author:** [@MarcSB](https://discourse.grlib.community/u/MarcSB)\
**Replies:** 0\
**Last updated:** [22 May 2026 16:11 UTC](https://discourse.grlib.community/t/greth-networking-instability-with-l2c-lite-enabled/560 "2026-05-22T16:11:09Z")

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Hello, We are experiencing a networking issue on our platform and would like to understand whether it could be related to cache coherency, DMA maintenance, or L2C Lite integration. Our setup uses: GRLIB 2024.4 4 NOEL…

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## [Kernel boots with PLIC, but fails to boot when using IMSIC+APLIC (MSI mode)](https://discourse.grlib.community/t/kernel-boots-with-plic-but-fails-to-boot-when-using-imsic-aplic-msi-mode/558)

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**Author:** [@WEI](https://discourse.grlib.community/u/WEI)\
**Replies:** 2\
**Last updated:** [20 May 2026 02:36 UTC](https://discourse.grlib.community/t/kernel-boots-with-plic-but-fails-to-boot-when-using-imsic-aplic-msi-mode/558 "2026-05-20T02:36:37Z")

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Hi everyone, I’m working on MSI support. Here’s my issue: Kernel boots fine with PLIC enabled. Kernel fails to boot with PLIC disabled + APLIC+IMSIC (MSI mode) enabled. My device tree: /\*plic0: plic@PLIC\_UNIT { co…

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## [NOEL-V CoreMark](https://discourse.grlib.community/t/noel-v-coremark/549)

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**Author:** [@Based](https://discourse.grlib.community/u/Based)\
**Replies:** 2\
**Last updated:** [2 March 2026 17:57 UTC](https://discourse.grlib.community/t/noel-v-coremark/549 "2026-03-02T17:57:07Z")

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Is it really true that NOEL-V is able to reach up to 4.69 CoreMark/MHz? After series of tests, we’ve measured the best score we could with the GRLIB Release 2025.1-b4296. 10 iterations were running for almost 12 seconds…

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## [GRMON 4.1.0 issues](https://discourse.grlib.community/t/grmon-4-1-0-issues/553)

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**Author:** [@MarcSB](https://discourse.grlib.community/u/MarcSB)\
**Replies:** 2\
**Last updated:** [29 January 2026 10:53 UTC](https://discourse.grlib.community/t/grmon-4-1-0-issues/553 "2026-01-29T10:53:12Z")

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Hello all, We have detected an issue when updating GRMON evaluation to version 4.1.0 (or 4.1.0.1). When we execute our ethernet initialization script we get the following error: Device index: greth0 EDCL ip 192.168.22…

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## [Debugging NOEL-V Over a JTAG Tunnel with OpenOCD](https://discourse.grlib.community/t/debugging-noel-v-over-a-jtag-tunnel-with-openocd/552)

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**Author:** [@WEI](https://discourse.grlib.community/u/WEI)\
**Replies:** 1\
**Last updated:** [28 January 2026 13:36 UTC](https://discourse.grlib.community/t/debugging-noel-v-over-a-jtag-tunnel-with-openocd/552 "2026-01-28T13:36:18Z")

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Hello, To reuse the same JTAG cable for both FPGA configuration and NOEL debugging, I chose the AHBJTAGRV with Xilinx FPGA TAP as the debugging link. mon\_ocd : ahbjtagrv generic map (tech =\> CFG\_AHB\_JTAG\_TEK, dtm\_sel =\>…

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## [Help debbuging within iunv.vhd](https://discourse.grlib.community/t/help-debbuging-within-iunv-vhd/546)

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**Author:** [@Based](https://discourse.grlib.community/u/Based)\
**Replies:** 4\
**Last updated:** [28 November 2025 10:26 UTC](https://discourse.grlib.community/t/help-debbuging-within-iunv-vhd/546 "2025-11-28T10:26:36Z")

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Hi to everyone Currently trying to simulate a NOEL-V release 2025.1-b4296 core with Modelsim. It works for a good portion of simulation, but then break with the following error: Failure: X in data going to cache And t…

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## [Handling interrupts in NOEL](https://discourse.grlib.community/t/handling-interrupts-in-noel/544)

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**Author:** [@Based](https://discourse.grlib.community/u/Based)\
**Replies:** 2\
**Last updated:** [14 October 2025 18:01 UTC](https://discourse.grlib.community/t/handling-interrupts-in-noel/544 "2025-10-14T18:01:20Z")

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I can’t figure how exactly does NOEL handle interrupts. According to The RISC-V Instruction Set Manual, all I need to do to enable interrupts is to set mstatus.MIE bit, enable them in mie csr register and write trap han…

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## [Plug & Play issue of NOEL-V SoC for GRLIB 2025.2](https://discourse.grlib.community/t/plug-play-issue-of-noel-v-soc-for-grlib-2025-2/540)

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**Author:** [@jyk](https://discourse.grlib.community/u/jyk)\
**Replies:** 6\
**Last updated:** [24 September 2025 12:13 UTC](https://discourse.grlib.community/t/plug-play-issue-of-noel-v-soc-for-grlib-2025-2/540 "2025-09-24T12:13:52Z")

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I am currently using NOEL-V processor, But I am facing the issue of GRMON cannot detect when integrating some other components to the AHB bus. Initially, I utilised the design template noelv-xilinx-zcu102 and successful…

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## [Issues when updating to GRLIB GPL 2025.2](https://discourse.grlib.community/t/issues-when-updating-to-grlib-gpl-2025-2/524)

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**Author:** [@MarcSB](https://discourse.grlib.community/u/MarcSB)\
**Replies:** 4\
**Last updated:** [27 August 2025 15:45 UTC](https://discourse.grlib.community/t/issues-when-updating-to-grlib-gpl-2025-2/524 "2025-08-27T15:45:54Z")

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Hello all, We recently upgraded our NOEL-V system from GPL 2023.4 to 2025.2, running on a Xilinx VCU118 FPGA. After the update, our ADA port (developed by @GuillermoVidal) stopped working. We updated all addresses as pe…

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## [Tap\_gen (GRLIB 2003) is still GNU GPL?](https://discourse.grlib.community/t/tap-gen-grlib-2003-is-still-gnu-gpl/531)

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**Author:** [@Lucas\_Elsys\_Design](https://discourse.grlib.community/u/Lucas_Elsys_Design)\
**Replies:** 0\
**Last updated:** [28 July 2025 07:17 UTC](https://discourse.grlib.community/t/tap-gen-grlib-2003-is-still-gnu-gpl/531 "2025-07-28T07:17:24Z")

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Hello, I am trying to use JTAG on NOELVCPU. At implementation time, I noticed that the module “tap\_gen” was missing. After Googling it on Internet, I have found a file of the same name “tap\_gen.vhd” in a Github reposito…

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## [NOELV L1 cache, replacement policy issue](https://discourse.grlib.community/t/noelv-l1-cache-replacement-policy-issue/517)

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**Author:** [@Lucas\_Elsys\_Design](https://discourse.grlib.community/u/Lucas_Elsys_Design)\
**Replies:** 4\
**Last updated:** [23 July 2025 08:44 UTC](https://discourse.grlib.community/t/noelv-l1-cache-replacement-policy-issue/517 "2025-07-23T08:44:13Z")

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Hello, I am currently using NOELV CPU (64 bits), and its L1 cache. From the specification, I understand that LRU replacement should be used when, for a given L1 cache set, all the 4 ways are in use (and a new line is to…

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## [RCC NOEL build for Ubuntu on M1/M3 processors](https://discourse.grlib.community/t/rcc-noel-build-for-ubuntu-on-m1-m3-processors/521)

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**Author:** [@adasilva1](https://discourse.grlib.community/u/adasilva1)\
**Replies:** 0\
**Last updated:** [12 July 2025 16:18 UTC](https://discourse.grlib.community/t/rcc-noel-build-for-ubuntu-on-m1-m3-processors/521 "2025-07-12T16:18:09Z")

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Would it be possible to build the NOEL-V RTEMS5 Software Development Environment for Ubuntu systems running on Apple Silicon M1/M3 processors?

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## [GRLIB GPL 2025.2 released](https://discourse.grlib.community/t/grlib-gpl-2025-2-released/518)

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**Author:** [@joaquin.espana](https://discourse.grlib.community/u/joaquin.espana)\
**Replies:** 0\
**Last updated:** [4 July 2025 13:11 UTC](https://discourse.grlib.community/t/grlib-gpl-2025-2-released/518 "2025-07-04T13:11:04Z")

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The development team is pleased to announce the release of GRLIB GPL 2025.2-b4298, which is now available for download from: https://download.gaisler.com/products/GRLIB/bin/grlib-gpl-2025.2-b4298.tar.gz Bitfile and net…

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## [L2C lite cache IP, PLRU replacement issue](https://discourse.grlib.community/t/l2c-lite-cache-ip-plru-replacement-issue/516)

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**Author:** [@Lucas\_Elsys\_Design](https://discourse.grlib.community/u/Lucas_Elsys_Design)\
**Replies:** 2\
**Last updated:** [4 July 2025 09:32 UTC](https://discourse.grlib.community/t/l2c-lite-cache-ip-plru-replacement-issue/516 "2025-07-04T09:32:42Z")

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Hello, I am experiencing some issues with L2C lite IP, in a design where NOELV CPU (64 bits) is used. In fact, I noticed that when I select PLRU replacement mode, only 2 ways out of 4 are used (I configured L2C lite IP …

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## [Can RGMII IP be used for Xilinx UltraScale technology?](https://discourse.grlib.community/t/can-rgmii-ip-be-used-for-xilinx-ultrascale-technology/464)

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**Author:** [@WEI](https://discourse.grlib.community/u/WEI)\
**Replies:** 4\
**Last updated:** [26 June 2025 01:34 UTC](https://discourse.grlib.community/t/can-rgmii-ip-be-used-for-xilinx-ultrascale-technology/464 "2025-06-26T01:34:07Z")

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Hi, has anyone used the RGMII IP to adapt GMII/RGMII? In GRLIB, the ‘RGMII’ uses IDDR and ODDR primitives, but it seems that the ‘unisim\_oddd\_reg’ entity does not have support for Xilinx UltraScale technology. How shou…

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## [Documentation Issue](https://discourse.grlib.community/t/documentation-issue/503)

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**Author:** [@GuillermoVidal](https://discourse.grlib.community/u/GuillermoVidal)\
**Replies:** 1\
**Last updated:** [30 April 2025 09:53 UTC](https://discourse.grlib.community/t/documentation-issue/503 "2025-04-30T09:53:53Z")

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Hello, In section 61.5 of the GRLIB IP Core User’s Manual there seems to be an error (GRIOMMU2 - AHB/AHB bridge with RISC-V IOMMU & IOPMP capabilities - Registers). The Interrupt-cause-to-vector register (icvec) is firs…

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## [GRLIB GPL 2025.1 released](https://discourse.grlib.community/t/grlib-gpl-2025-1-released/489)

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**Author:** [@joaquin.espana](https://discourse.grlib.community/u/joaquin.espana)\
**Replies:** 4\
**Last updated:** [23 April 2025 12:48 UTC](https://discourse.grlib.community/t/grlib-gpl-2025-1-released/489 "2025-04-23T12:48:36Z")

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The development team is pleased to announce the release of GRLIB GPL 2025.1-b4296, which is now available for download from: https://download.gaisler.com/products/GRLIB/bin/grlib-gpl-2025.1-b4296.tar.gz Bitfile and net…

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## [Design Compiler and Formality tool of synopsys showing error in RTL code](https://discourse.grlib.community/t/design-compiler-and-formality-tool-of-synopsys-showing-error-in-rtl-code/502)

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**Author:** [@Chiragkumar](https://discourse.grlib.community/u/Chiragkumar)\
**Replies:** 2\
**Last updated:** [23 April 2025 12:10 UTC](https://discourse.grlib.community/t/design-compiler-and-formality-tool-of-synopsys-showing-error-in-rtl-code/502 "2025-04-23T12:10:33Z")

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For Microcontroller Version with 32 bits Following lines showing error in code during synthesis or/and formality. File Name : nvsupport.vhd - LINE NO. 8438 to 8445 ( Reason : wdata size 32 bit and function try to acc…

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## [NOEL-V XLEN 64 bits with AHB 32 bits](https://discourse.grlib.community/t/noel-v-xlen-64-bits-with-ahb-32-bits/498)

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**Author:** [@Lucas\_Elsys\_Design](https://discourse.grlib.community/u/Lucas_Elsys_Design)\
**Replies:** 2\
**Last updated:** [17 April 2025 13:23 UTC](https://discourse.grlib.community/t/noel-v-xlen-64-bits-with-ahb-32-bits/498 "2025-04-17T13:23:18Z")

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Hello, Into our design we have configure NOEL-V processor with XLEN = 64 (configuration CFG\_NOELV\_XLEN = 64) We would like to have the internal AHB size to 32 bits length (configuration of CFG\_AHBDW=64) In this config…

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## [Large Physical Addressing](https://discourse.grlib.community/t/large-physical-addressing/446)

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**Author:** [@WEI](https://discourse.grlib.community/u/WEI)\
**Replies:** 1\
**Last updated:** [1 April 2025 10:22 UTC](https://discourse.grlib.community/t/large-physical-addressing/446 "2025-04-01T10:22:52Z")

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Hi, I see that leon-linux-5.10-1.8 has added support for 36-bit physical addresses. Will new LEON hardware be included in the next GRLIB ? Also, does NOEL have a corresponding plan ?

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## [NOEL-V on Pynq-Z2](https://discourse.grlib.community/t/noel-v-on-pynq-z2/457)

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**Author:** [@digi9](https://discourse.grlib.community/u/digi9)\
**Replies:** 1\
**Last updated:** [1 April 2025 10:21 UTC](https://discourse.grlib.community/t/noel-v-on-pynq-z2/457 "2025-04-01T10:21:03Z")

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Hello, I am trying to port NOEL-V on Pynq-Z2 (using Linux Debian PC). However, I am having trouble following the GRLIB guides as to what steps I need to follow to get this to work. I am under the impression that for boa…

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## [Logic Equivalence Check using formality tool having fatal error for cctrlnv.vhd and cpucorenv.vhd](https://discourse.grlib.community/t/logic-equivalence-check-using-formality-tool-having-fatal-error-for-cctrlnv-vhd-and-cpucorenv-vhd/488)

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**Author:** [@Chiragkumar](https://discourse.grlib.community/u/Chiragkumar)\
**Replies:** 1\
**Last updated:** [1 April 2025 10:16 UTC](https://discourse.grlib.community/t/logic-equivalence-check-using-formality-tool-having-fatal-error-for-cctrlnv-vhd-and-cpucorenv-vhd/488 "2025-04-01T10:16:41Z")

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For Release 2024.4-b4295 I am performing equivalency check of RTL and netlist (generated using Design Compiler) using formality tool of Synopsys. cctrlnv.vhd and cpucorenv.vhd file shows fatal error during execution o…

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